Interview Question 14: Continuous Memory Read Writes

This is a high performance design question. Create a block which is an event counter as shown below. 

This module is implemented using a single port memory as it has large number (millions) of counters. Every clock a valid signal indicates an increment or decrement operation of a counter indicated by an address. This block also produces output of the selected counter after a fixed latency.

Essentially you need to design a “Read-Modify-Write” operation. Assume that the chosen memory requires 2 clocks to complete the write and 2 clocks to read the data. The command and address combination can happen in any sequence. For example you may receive increment/decrement command for the same address on 10 consecutive clock cycles.