Tuesday, January 29, 2019

Interview Question 31: Create a Verilog module to drive a PWM signal to the motor.

  

Create a module to drive a motor with a PWM output. You are provided an N-bit bus to indicate duty cycle. This fairly open-ended question. You can add more ports to time the circuit etc.



Follow-up questions: How will you treat the feedback signal from the motor?

Hint: You are expected to ask about frequency ratios and perform synchronization etc.