Interview Question 28: Communicate with least amount of wires

Here is another real-life scenario. Host talks to the first Chip-1 over a standard and wide interface. The host was also supposed to talk to Chip-2 over the same interface. Chip-2 was pin constrained, so it was decided to connect Chip-2 to Chip-1 and create a copy of config and status registers on Chip-1 so that host can read it.

Can you design a very simple interface between these two chips with just 2-3 wires? Power is not an issue. Timing is not an issue as the frequency is low around 100MHz. The goal is to create a quick and dirty solution.

Ignore I2C solution as you don't want to invest time in buying IP and integrating it.

Interview Question 27: Detect ASIC Orientation before it burns

This is a real-life problem. An incompletely marked ASICs are put on tester socket. They get burnt if incorrectly oriented. These chips are very expensive.

How will you design these ASICs and surrounding tester board logic so that these ASICs are not powered up if they are incorrectly positioned?

Assume that budget is relaxed and you are free to add extra pins as well extra chip (FPGAs, CPLDs) on board to make this possible.