Interview Question 23: Micro Architect a Counters Block

Micro-architect a counters module as shown in above picture.

This module contains a large number of counters using an SRAM. This memory takes two clocks to write and three clocks to read data. You need to read counter value based on provided Address_In, perform increment or decrement operation, and then write it back to the same location to update the value. The output ports provide updated counter values.

This may seem like a simple read-modify-write operation but account for corner cases like consecutive operations performed on the same address.

Interview Question 22: Micro Architect a Block

You are asked to micro-architect this block. The goal is to keep performance high enough to keep Encryption Engine busy all the time.

Assumptions:

- External memory (DDR) has 16Gbps bandwidth but 45 clocks latency

- DMA description memory has 6 clocks of latency and needs 6 clocks to fetch the whole descriptor.

- Encryption engine provides data in next clock.

This question shows the experience and maturity of the designer. The key concepts which one should look for are

- Latency

- Performance

- Pipelining of memory operations

- FIFO sizing

- State Machines etc

Interview Question 21: Find more than two 1s in the input vector

- Try to solve the problem using 2-3 different ways with different complexities.